عنوان مقاله
حالت پایدار و مدل پویای کنترلر یکپارچه عبور قدرت(UPFC) برای مطالعه سیستم قدرت
فهرست مطالب
چکیده
مقدمه
مدل ریاضی UPFC
مثالهای کاربردی و اعتبارسنجی مدل
نتیجه گیری
بخشی از مقاله
مدل پویای UPFC
مدل پویای مدار قدرت UPFC درabc (استاتور) فریم مرجع نیز توسط معادله (9) داده شدهاست. ماتریس تبدیل Park بسطیافته معادله (11) برای توسعه فرم متغییر-زمانی معادله (9) در فریم مرجع چرخشی دو محوره (d-q-o) همانطور که توسط معادله (12) ارائه میشود، استفاده میشود
کلمات کلیدی:
STEADY-STATE AND DYNAMIC MODELS OF UNIFIED POWER FLOW CONTROLLER (UPFC) FOR POWER SYSTEM STUDIES A. Nabavi-Niaki M.R. lravani Department of Electrical and Computer Engineering University of Toronto Toronto, Ontario M5S 1A4 Canada Abstract: This paper provides comprehensive development procedures and final forms of mathematical models of unified power flow controller (UPFC) for steadystate, transient stability a$ eigenvalue studies. Based on the developed models, the impacts of control strategy, parameters and location of UPFC on power system operating conditions are discussed. The accuracy of the developed models is verified through comparing the study results with those obtained from detailed time-domain simulation using the Electromagnetic Transients Program (EMTP). Keywords: Modelling; FACTS; UPFC, Eigen Analysis; Steady-State Analysis, Transient Stability Analysis. 1. INTRODUCTION Unified power flow controller (UPFC) [1,2] can be used for power flow control, loop-flow control, load sharing among parallel corridors, enhancement of transient stability, mitigation of system oscillations and voltage (reactive power) regulation. Performance analysis and control synthesis of UPFC require its steady-state and dynamic models. Reference [ 11 introduces a steady-state UPFC model based on a single, ideal, series voltage source. Reference [3] utilizes two ideal voltage sources, one in series and one in parallel as UPFC steady-state model. The steady-state UPFC model suggested in [4] is based upon one ideal, series voltage source, and one ideal, shunt current source. The above steady-state models are based on simplifying assumptions and consequently have various limitations. A two-source UPFC steady-state model including source impedances is suggested in [5]. The primary objective of this paper is to develop steadystate and dynamic models of UPFC for power flow analysis, transient stability investigation and eigen analysis. Typical applications of the models are presented, and where applicable the EMTP is used to verify the accuracy of the developed models. 2. UPFC MATHEMATICAL MODEL Figure 1 shows single-phase, schematic diagram of the power circuit of a UPFC which is composed of an excitation transformer (ET), a boosting transformer (BT), two threephase GTO based voltage source converters (VSCs), and a dc link capacitor. In Figure 1, m and 6 refer to amplitude modulation index and phase-angle of the control signal of each VSC respectively. Figure 2 shows detailed threephase circuit diagram of ET, BT and the converters. The two transformers are identified by their per phase leakage inductances and resistances. Figure 2 illustrates that each converter leg is composed of a GTO valve and a diode valve in antiparallel connection to permit bidirectional current flow. In the case of high-voltage applications, where only GTOconverters are economical, and the switching frequency is limited to a few hundred hertz, off-line optimized pulse patterns are often selected for the converter. The pulse width modulation (PWM) approach which is used in this paper encompasses the concept of optimized pulse pattern schemes. For cost reduction and maximum converter utilization, PWM-schemes such as space-vector modulation are applied in practice. As long as the fundamental frequency components under balanced operating conditions are concerned, the space-vector approach and the general PWM approach used in this paper provide the same mathematical model. To describe the modelling procedures, let's consider the dc link, phase 'a' of ET, and the corresponding VSC-E arms as shown in Figure 3. In Fig. 3, fE and tE represent per phase resistance and inductance of ET. In Fig. 3, the bidirectional switches are identified by <E~ and Sku which can be either on or off. rs is the switch on-state resistance. rs also includes valve conduction losses in the analysis. S, (SE,) is defined as the switching function of switch 96 WM 251-6 PWRS A paper recommended and approved by the IEEE Power System Engineering Committee of the IEEE Power Engineering Society for presentation at the 1996 IEEWPES Winter Meeting, January 21- 25, 1996, Baltimore, MD. Manuscript submitted July 28,1995; made available for printing January 10, 1996