عنوان مقاله
معرفی ضرب کننده آنالوگ چهار ربعی کم توان و کم ولتاژ ورودی حجمی جدید در وارون سازی ضعیف
فهرست مطالب
مقدمه
عملیات ضرب کننده پیشنهاد شده
فرمولاسیون نابرابری و عدم انطباق ضرب کننده
نتایج
نتیجه گیری
بخشی از مقاله
فرمولاسیون نابرابری و عدم انطباق ضرب کننده
با توجه به تغییرات ناشی از پارامترهای وابسته فرایند و نابرابری در ولتاژهاو جریانات بایاس نابرابری کل در مدار پیشنهاد شده را می توان مورد آنالیز قرار داد. نابرابری و عدم انطباق وابسته به فرایند در جریان درین را می توان در پارامتر ID0 مورد رسیدگی قرار داد که می تواند شامل نابرابریβ ، نابرابری VTH که به صورت توانی جریان را تغییر می دهد و ناشی از VBS باشد. این قبیل نابرابریها با انتخاب جملهID0(1+∆𝐼_𝐷0) لحاظ شده و نابرابری و عدم انطباق بایاس را می توان در مراحل بعدی و با نوشتن IBIAS+∆𝐼_𝐵𝐼𝐴𝑆 برای عبارت جریان نهایی مشتمل بر نابرابری لحاظ نمود.
کلمات کلیدی:
A novel bulk-input low voltage and low power four quadrant analog multiplier in weak inversion Antaryami Panigrahi • Prashanta Kumar Paul Received: 17 February 2012 / Revised: 13 August 2012 / Accepted: 14 August 2012 / Published online: 5 September 2012 Springer Science+Business Media, LLC 2012 Abstract A new four quadrant voltage mode bulk input analog multiplier is presented .The proposed multiplier is designed to operate in weak inversion. Multiplication is done by driving the bulk terminals of the MOS devices which offers linear dynamic range of ±80 mV. The simulation shows, it has a linearity error of 5.6 %, THD of nearly 5 % and -3 dB band width of 221 kHz. Total power consumption is very low i.e. 714 nW. The circuit operates at a supply voltage of 0.5 V and is designed using 180 nm CMOS technology. It is suitable for low power bioelectronics and neural applications. Keywords Analog multiplier Bulk-input MOS circuits Four quadrant multiplication Low voltage and low power analog IC design MOS transistor Weak inversion 1 Introduction Analog IC design has been revolutionized by the low voltage and low power design methodology especially when it comes to portable, battery operated systems. In analog signal processing, four-quadrant-multiplication is one of the important operations performed on signals. It is used in a number of applications including modulator, doublers, adaptive filters in communication circuit, in phase detection in Phase Locked Loop, as a mixer in a front-end receiver and synaptic multiplier in hardware implementation of neural networks [1, 2], convolver in sensor applications [3]. Considering the importance of multiplier and its applications, it is challenging to design a multiplier suitable for low voltage and low power operations. Analog multiplier design was first reported in the work of Gilbert [4] which was implemented using BJT. Since then number of works has been reported specially in CMOS technology based on (i) mode of input i.e. current mode and voltage mode and (ii) the region of the operation of MOS device. If we consider the designs based on strong inversion regime, the voltage mode multipliers in saturation can be found in [5, 6], in linear region can be found in [7, 8], and current mode multipliers can be found [9, 10]. For saturated weak inversion regime, voltage mode multipliers are reported in [11–13] and current mode multipliers in [14]. The designs based on weak inversion region mostly followed the Gilbert cell topology and modified Gilbert cell [15] for voltage mode operation. The designs in weak inversion suffered from poor dynamic range, limited voltage swing (few hundred mV) and limited band width. For low voltage and low power applications operating devices in weak inversion is quite advantageous [16, 17]. One of the best features being very low VDS:sat which nearly four times the thermal voltage [18, 19]. Usua
